Certain types of nonvolatile memory devices, circuits employing floating-gate devices, high-voltage drivers and other circuits fabricated in logic CMOS require relatively high voltages (e.g., 10 volts in a 3.3 volt CMOS process). For example, in nonvolatile memory devices high voltages are often used to by circuits that program and erase information stored on the floating gates, and on-chip charge pumps are generally used to generate these high voltages. In all these circuits, switches are required to selectively apply the high voltages to specific circuit elements.
The only silicon structure in generic n-well CMOS processes (where “generic” means that a process lacks specialized structures, such as for high-voltage devices, and n-well is the most common process type in the industry) that can handle voltages significantly greater than the logic supply voltage is an n-well. This limitation means that there are only three types of high-voltage structures that can be built in such a generic n-well CMOS process: (1) an nFET (n-channel Field Effect Transistor) that has, an n-well for its drain and/or source and examples of which include the Lateral-Diffused Metal-Oxide Semiconductor nFET (LDMOS nFET) and Drain Extended MOS nFET (DEMOS nFET); (2) well resistors or well wires, where the well is used as a conductive element that can tolerate high voltages; and (3) pFETs (p-channel Field Effect Transistors) in an n-well, where the n-well itself can be at a high voltage relative to the substrate. Because a single pFET cannot normally handle drain-to-source voltages much larger than the rated supply voltage for a given process (e.g., not much more than 3.3V for a 3.3V CMOS process), it is common to cascode a plurality of pFETs (i.e., put two or more in series) in one or more n-wells, in order to handle such high voltages. Note that these same three basic devices can be fabricated in p-well CMOS processes, with p replaced by n (and vice versa), and with positive voltages replaced by negative voltages (and vice versa).
Switch circuits which can tolerate a high-voltage supply and can generate and use intermediate voltages, as well as generate high-voltage drive signals from low-voltage logic-gate-level signals, all while minimizing power consumption, are highly desired.